Abhishekkumar Rakeshkumar Mishra / Fulltime - Design and test engineer

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Design and test engineer

KPIT Technologies Ltd.

India
Junior Team Member

Working areas: • Embedded C, C, C++ & Python, and MATLAB & SIMULINK • Software development life cycle (SDLC), Software testing, Unit testing, integration testing, Model in loop (MIL), software in loop (SIL) testing, and Verification & validation • Design issue analysis and resolution • Project management, Client management, Planning

Automotive • 42 Hours / Week • In-House

Progress

Nov 2015 - Jun 2018

Skills

Embedded C
C
C++
Project Management
Client management
Planning
Testing
Software development life cycle
Documentation

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Certified Associate in Project Management